The present invention relates generally to semiconductor devices, and more particularly to a semiconductor device with buried local interconnect wires.
The fabrication of semiconductor devices involves forming electronic components in and on semiconductor substrates, such as silicon wafers. These electronic components may include one or more conductive layers, one or more insulation layers, and doped regions formed by implanting various dopants into portions of a semiconductor substrate to achieve specific electrical properties. Semiconductor devices include transistors, resistors, capacitors, and the like, with intermediate and overlying metallization patterns at varying levels, separated by dielectric materials, which interconnect the semiconductor devices to form integrated circuits.
Local interconnect structures are used to electrically connect the diffusion regions of different transistors fabricated on a common substrate, and to connect diffusion regions to gate layers. Typically, the metal interconnect wiring is built on top the top of a semiconductor chip, while the device portion is on the bottom, under the wiring. As many modern integrated circuits contain millions of individual transistors and other electronic components, power must be supplied to a large number of electrical components fabricated in an integrated circuit. Often, the power is supplied by routing one or more conductive layers throughout the circuit, and making contact through previously deposited layers to the components of the device. This can lead to significant consumption of portions of the semiconductor chip surface that could otherwise be used for active circuit fabrication.